Item | Slot #1 | Slot #2 | Slot #3 | Slot #4 |
Ram Type |
DDR3 |
Not Populated |
DDR3 |
Not Populated |
Standard Name |
DDR3-1333 |
|
DDR3-1333 |
|
Module Name |
PC3-10600 |
|
PC3-10600 |
|
Memory Capacity (MB) |
8192 |
|
8192 |
|
Bus Clockspeed (Mhz) |
666.67 |
|
666.67 |
|
Jedec Manufacture Name |
G Skill Intl |
|
G Skill Intl |
|
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|
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|
SPD Revision |
1.1 |
|
1.1 |
|
Registered |
No |
|
No |
|
ECC |
No |
|
No |
|
DIMM Slot # |
1 |
|
3 |
|
Manufactured |
Year 0 |
|
Year 0 |
|
Module Part # |
F3-1600C9-8GXM |
|
F3-1600C9-8GXM |
|
Module Revision |
0x0 |
|
0x0 |
|
Module Serial # |
0x0 |
|
0x0 |
|
Module Manufacturing Location |
0 |
|
0 |
|
# of Row Addressing Bits |
16 |
|
16 |
|
# of Column Addressing Bits |
10 |
|
10 |
|
# of Banks |
8 |
|
8 |
|
# of Ranks |
2 |
|
2 |
|
Device Width in Bits |
8 |
|
8 |
|
Bus Width in Bits |
64 |
|
64 |
|
Module Voltage |
1.5V |
|
1.5V |
|
CAS Latencies Supported |
5 6 7 8 9 10 |
|
5 6 7 8 9 10 |
|
Timings @ Max Frequency |
9-9-9-24 |
|
9-9-9-24 |
|
Minimum Clock Cycle Time, tCK (ns) |
1.500 |
|
1.500 |
|
Minimum CAS Latency Time, tAA (ns) |
13.125 |
|
13.125 |
|
Minimum RAS to CAS Delay, tRCD (ns) |
13.125 |
|
13.125 |
|
Minimum Row Precharge Time, tRP (ns) |
13.125 |
|
13.125 |
|
Minimum Active to Precharge Time, tRAS (ns) |
36.000 |
|
36.000 |
|
Minimum Row Active to Row Active Delay, tRRD (ns) |
6.000 |
|
6.000 |
|
Minimum Auto-Refresh to Active/Auto-Refresh Time, tRC (ns) |
49.125 |
|
49.125 |
|
Minimum Auto-Refresh to Active/Auto-Refresh Command Period, tRFC (ns) |
260.000 |
|
260.000 |
|
|
|
|
|
|
DDR3 Specific SPD Attributes |
|
|
|
|
Write Recovery Time, tWR (ns) |
15.000 |
|
15.000 |
|
Internal Write to Read Command Delay, tWTR (ns) |
7.500 |
|
7.500 |
|
Internal Read to Precharge Command Delay, tRTP (ns) |
7.500 |
|
7.500 |
|
Minimum Four Activate Window Delay, tFAW (ns) |
30.000 |
|
30.000 |
|
RZQ / 6 Supported |
Yes |
|
Yes |
|
RZQ / 7 Supported |
Yes |
|
Yes |
|
DLL-Off Mode Supported |
Yes |
|
Yes |
|
Maximum Operating Temperature (C) |
95 |
|
95 |
|
Refresh Rate at Extended Operating Temperature Range |
1X |
|
1X |
|
Auto-self Refresh Supported |
Yes |
|
Yes |
|
On-die Thermal Sensor Readout Supported |
No |
|
No |
|
Partial Array Self Refresh Supported |
No |
|
No |
|
Thermal Sensor Present |
No |
|
No |
|
Non-standard SDRAM Type |
Standard Monolithic |
|
Standard Monolithic |
|
Module Type |
UDIMM |
|
UDIMM |
|
Module Height (mm) |
30 |
|
30 |
|
Module Thickness (front), (mm) |
2 |
|
2 |
|
Module Thickness (back), (mm) |
2 |
|
2 |
|
Module Width (mm) |
133.5 |
|
133.5 |
|
Reference Raw Card Used |
Raw Card B Rev. 1 |
|
Raw Card B Rev. 1 |
|
DRAM Manufacture ID |
1229 |
|
1229 |
|
# of DRAM Rows |
0 |
|
0 |
|
# of Registers |
0 |
|
0 |
|
Register Manufacturer |
|
|
|
|
Register Type |
|
|
|
|
Register Revision |
0 |
|
0 |
|
|
|
|
|
|
XMP Attributes |
|
|
|
|
XMP Revision |
1.2 |
|
1.2 |
|
Enthusiast / Certified Profile |
|
|
|
|
Module voltage |
1.50V |
|
1.50V |
|
Clock speed (Mhz) |
800.00 |
|
800.00 |
|
Minimum clock cycle time, tCK (ns) |
1.250 |
|
1.250 |
|
Supported CAS latencies |
9 |
|
9 |
|
Minimum CAS latency time, tAA (ns) |
10.875 |
|
10.875 |
|
Minimum RAS to CAS delay time, tRCD (ns) |
10.875 |
|
10.875 |
|
Minimum row precharge time, tRP (ns) |
10.875 |
|
10.875 |
|
Minimum active to precharge time, tRAS (ns) |
29.625 |
|
29.625 |
|
Supported timing at highest clock speed |
9-9-9-24 |
|
9-9-9-24 |
|
Minimum Row Active to Row Active Delay, tRRD (ns) |
6.000 |
|
6.000 |
|
Minimum Active to Auto-Refresh Delay, tRC (ns) |
40.875 |
|
40.875 |
|
Minimum Recovery Delay, tRFC (ns) |
260.000 |
|
260.000 |
|
Minimum Write Recovery time, tWR (ns) |
15.000 |
|
15.000 |
|
Minimum Write to Read CMD Delay, tWTR (ns) |
7.500 |
|
7.500 |
|
Minimum Read to Pre-charge CMD Delay, tRTP (ns) |
7.500 |
|
7.500 |
|
Minimum Four Activate Window Delay, tFAW (ns) |
30.000 |
|
30.000 |
|
Maximum Average Periodic Refresh Interval, tREFI (us) |
7.875 |
|
7.875 |
|
Write to Read CMD Turn-around Time Optimizations |
No adjustment |
|
No adjustment |
|
Read to Write CMD Turn-around Time Optimizations |
No adjustment |
|
No adjustment |
|
Back 2 Back CMD Turn-around Time Optimizations |
No adjustment |
|
No adjustment |
|
System CMD Rate Mode |
2T |
|
2T |
|
Extreme Profile |
|
|
|
|
Module voltage |
1.50V |
|
1.50V |
|
Clock speed (Mhz) |
800.00 |
|
800.00 |
|
Minimum clock cycle time, tCK (ns) |
1.250 |
|
1.250 |
|
Supported CAS latencies |
9 |
|
9 |
|
Minimum CAS latency time, tAA (ns) |
10.875 |
|
10.875 |
|
Minimum RAS to CAS delay time, tRCD (ns) |
10.875 |
|
10.875 |
|
Minimum row precharge time, tRP (ns) |
10.875 |
|
10.875 |
|
Minimum active to precharge time, tRAS (ns) |
29.625 |
|
29.625 |
|
Supported timing at highest clock speed |
9-9-9-24 |
|
9-9-9-24 |
|
Minimum Row Active to Row Active Delay, tRRD (ns) |
6.000 |
|
6.000 |
|
Minimum Active to Auto-Refresh Delay, tRC (ns) |
40.875 |
|
40.875 |
|
Minimum Recovery Delay, tRFC (ns) |
260.000 |
|
260.000 |
|
Minimum Write Recovery time, tWR (ns) |
15.000 |
|
15.000 |
|
Minimum Write to Read CMD Delay, tWTR (ns) |
7.500 |
|
7.500 |
|
Minimum Read to Pre-charge CMD Delay, tRTP (ns) |
7.500 |
|
7.500 |
|
Minimum Four Activate Window Delay, tFAW (ns) |
30.000 |
|
30.000 |
|
Maximum Average Periodic Refresh Interval, tREFI (us) |
7.875 |
|
7.875 |
|
Write to Read CMD Turn-around Time Optimizations |
No adjustment |
|
No adjustment |
|
Read to Write CMD Turn-around Time Optimizations |
No adjustment |
|
No adjustment |
|
Back 2 Back CMD Turn-around Time Optimizations |
No adjustment |
|
No adjustment |
|
System CMD Rate Mode |
2T |
|
2T |
|