Item | Module #1 | Module #2 | Module #3 | Module #4 | Module #5 | Module #6 | Module #7 | Module #8 |
Ram Type |
DDR3 |
DDR3 |
DDR3 |
DDR3 |
DDR3 |
DDR3 |
DDR3 |
DDR3 |
Standard Name |
DDR3-1333 |
DDR3-1333 |
DDR3-1333 |
DDR3-1333 |
DDR3-1333 |
DDR3-1333 |
DDR3-1333 |
DDR3-1333 |
Module Name |
PC3-10600 |
PC3-10600 |
PC3-10600 |
PC3-10600 |
PC3-10600 |
PC3-10600 |
PC3-10600 |
PC3-10600 |
Memory Capacity (MB) |
4096 |
4096 |
4096 |
4096 |
4096 |
4096 |
4096 |
4096 |
Bus Clockspeed (Mhz) |
666.67 |
666.67 |
666.67 |
666.67 |
666.67 |
666.67 |
666.67 |
666.67 |
Jedec Manufacture Name |
Corsair |
Corsair |
Corsair |
Corsair |
Corsair |
Corsair |
Corsair |
Corsair |
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SPD Revision |
1.1 |
1.1 |
1.1 |
1.1 |
1.1 |
1.1 |
1.1 |
1.1 |
Registered |
No |
No |
No |
No |
No |
No |
No |
No |
ECC |
No |
No |
No |
No |
No |
No |
No |
No |
DIMM Slot # |
1 |
2 |
5 |
6 |
9 |
10 |
13 |
14 |
Manufactured |
Year 0 |
Year 0 |
Year 0 |
Year 0 |
Year 0 |
Year 0 |
Year 0 |
Year 0 |
Module Part # |
CMT8GX3M2B2133C9 |
CMT8GX3M2B2133C9 |
CMT8GX3M2B2133C9 |
CMT8GX3M2B2133C9 |
CMT16GX3M4X2133C9 |
CMT16GX3M4X2133C9 |
CMT16GX3M4X2133C9 |
CMT16GX3M4X2133C9 |
Module Revision |
0x0 |
0x0 |
0x0 |
0x0 |
0x0 |
0x0 |
0x0 |
0x0 |
Module Serial # |
0x0 |
0x0 |
0x0 |
0x0 |
0x0 |
0x0 |
0x0 |
0x0 |
Module Manufacturing Location |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
# of Row Addressing Bits |
15 |
15 |
15 |
15 |
15 |
15 |
15 |
15 |
# of Column Addressing Bits |
10 |
10 |
10 |
10 |
10 |
10 |
10 |
10 |
# of Banks |
8 |
8 |
8 |
8 |
8 |
8 |
8 |
8 |
# of Ranks |
2 |
2 |
2 |
2 |
2 |
2 |
2 |
2 |
Device Width in Bits |
8 |
8 |
8 |
8 |
8 |
8 |
8 |
8 |
Bus Width in Bits |
64 |
64 |
64 |
64 |
64 |
64 |
64 |
64 |
Module Voltage |
1.5V |
1.5V |
1.5V |
1.5V |
1.5V |
1.5V |
1.5V |
1.5V |
CAS Latencies Supported |
6 7 9 |
6 7 9 |
6 7 9 |
6 7 9 |
6 7 9 |
6 7 9 |
6 7 9 |
6 7 9 |
Timings @ Max Frequency |
9-9-9-24 |
9-9-9-24 |
9-9-9-24 |
9-9-9-24 |
9-9-9-24 |
9-9-9-24 |
9-9-9-24 |
9-9-9-24 |
Minimum Clock Cycle Time, tCK (ns) |
1.500 |
1.500 |
1.500 |
1.500 |
1.500 |
1.500 |
1.500 |
1.500 |
Minimum CAS Latency Time, tAA (ns) |
13.125 |
13.125 |
13.125 |
13.125 |
13.125 |
13.125 |
13.125 |
13.125 |
Minimum RAS to CAS Delay, tRCD (ns) |
13.125 |
13.125 |
13.125 |
13.125 |
13.125 |
13.125 |
13.125 |
13.125 |
Minimum Row Precharge Time, tRP (ns) |
13.125 |
13.125 |
13.125 |
13.125 |
13.125 |
13.125 |
13.125 |
13.125 |
Minimum Active to Precharge Time, tRAS (ns) |
36.000 |
36.000 |
36.000 |
36.000 |
36.000 |
36.000 |
36.000 |
36.000 |
Minimum Row Active to Row Active Delay, tRRD (ns) |
6.000 |
6.000 |
6.000 |
6.000 |
6.000 |
6.000 |
6.000 |
6.000 |
Minimum Auto-Refresh to Active/Auto-Refresh Time, tRC (ns) |
48.125 |
48.125 |
48.125 |
48.125 |
48.125 |
48.125 |
48.125 |
48.125 |
Minimum Auto-Refresh to Active/Auto-Refresh Command Period, tRFC (ns) |
160.000 |
160.000 |
160.000 |
160.000 |
160.000 |
160.000 |
160.000 |
160.000 |
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DDR3 Specific SPD Attributes |
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|
|
|
Write Recovery Time, tWR (ns) |
15.000 |
15.000 |
15.000 |
15.000 |
15.000 |
15.000 |
15.000 |
15.000 |
Internal Write to Read Command Delay, tWTR (ns) |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
Internal Read to Precharge Command Delay, tRTP (ns) |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
Minimum Four Activate Window Delay, tFAW (ns) |
30.000 |
30.000 |
30.000 |
30.000 |
30.000 |
30.000 |
30.000 |
30.000 |
RZQ / 6 Supported |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
RZQ / 7 Supported |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
DLL-Off Mode Supported |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Maximum Operating Temperature (C) |
95 |
95 |
95 |
95 |
95 |
95 |
95 |
95 |
Refresh Rate at Extended Operating Temperature Range |
1X |
1X |
1X |
1X |
1X |
1X |
1X |
1X |
Auto-self Refresh Supported |
No |
No |
No |
No |
No |
No |
No |
No |
On-die Thermal Sensor Readout Supported |
No |
No |
No |
No |
No |
No |
No |
No |
Partial Array Self Refresh Supported |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Yes |
Thermal Sensor Present |
No |
No |
No |
No |
No |
No |
No |
No |
Non-standard SDRAM Type |
Standard Monolithic |
Standard Monolithic |
Standard Monolithic |
Standard Monolithic |
Standard Monolithic |
Standard Monolithic |
Standard Monolithic |
Standard Monolithic |
Module Type |
UDIMM |
UDIMM |
UDIMM |
UDIMM |
UDIMM |
UDIMM |
UDIMM |
UDIMM |
Module Height (mm) |
30 |
30 |
30 |
30 |
30 |
30 |
30 |
30 |
Module Thickness (front), (mm) |
3 |
3 |
3 |
3 |
3 |
3 |
3 |
3 |
Module Thickness (back), (mm) |
3 |
3 |
3 |
3 |
3 |
3 |
3 |
3 |
Module Width (mm) |
133.5 |
133.5 |
133.5 |
133.5 |
133.5 |
133.5 |
133.5 |
133.5 |
Reference Raw Card Used |
Raw Card B Rev. 0 |
Raw Card B Rev. 0 |
Raw Card B Rev. 0 |
Raw Card B Rev. 0 |
Raw Card B Rev. 0 |
Raw Card B Rev. 0 |
Raw Card B Rev. 0 |
Raw Card B Rev. 0 |
DRAM Manufacture ID |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
# of DRAM Rows |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
# of Registers |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
Register Manufacturer |
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|
|
|
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|
|
Register Type |
|
|
|
|
|
|
|
|
Register Revision |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
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|
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XMP Attributes |
|
|
|
|
|
|
|
|
XMP Revision |
1.3 |
1.3 |
1.3 |
1.3 |
1.3 |
1.3 |
1.3 |
1.3 |
Enthusiast / Certified Profile |
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|
Module voltage |
1.50V |
1.50V |
1.50V |
1.50V |
1.50V |
1.50V |
1.50V |
1.50V |
Clock speed (Mhz) |
1066.67 |
1066.67 |
1066.67 |
1066.67 |
1066.67 |
1066.67 |
1066.67 |
1066.67 |
Minimum clock cycle time, tCK (ns) |
0.938 |
0.938 |
0.938 |
0.938 |
0.938 |
0.938 |
0.938 |
0.938 |
Supported CAS latencies |
6 9 |
6 9 |
6 9 |
6 9 |
6 9 |
6 9 |
6 9 |
6 9 |
Minimum CAS latency time, tAA (ns) |
8.375 |
8.375 |
8.375 |
8.375 |
8.375 |
8.375 |
8.375 |
8.375 |
Minimum RAS to CAS delay time, tRCD (ns) |
10.313 |
10.313 |
10.313 |
10.313 |
10.313 |
10.313 |
10.313 |
10.313 |
Minimum row precharge time, tRP (ns) |
9.375 |
9.375 |
9.375 |
9.375 |
9.375 |
9.375 |
9.375 |
9.375 |
Minimum active to precharge time, tRAS (ns) |
25.313 |
25.313 |
25.313 |
25.313 |
25.313 |
25.313 |
25.313 |
25.313 |
Supported timing at highest clock speed |
9-11-10-27 |
9-11-10-27 |
9-11-10-27 |
9-11-10-27 |
9-11-10-27 |
9-11-10-27 |
9-11-10-27 |
9-11-10-27 |
Minimum Row Active to Row Active Delay, tRRD (ns) |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
Minimum Active to Auto-Refresh Delay, tRC (ns) |
50.625 |
50.625 |
50.625 |
50.625 |
50.625 |
50.625 |
50.625 |
50.625 |
Minimum Recovery Delay, tRFC (ns) |
160.000 |
160.000 |
160.000 |
160.000 |
160.000 |
160.000 |
160.000 |
160.000 |
Minimum Write Recovery time, tWR (ns) |
15.000 |
15.000 |
15.000 |
15.000 |
15.000 |
15.000 |
15.000 |
15.000 |
Minimum Write to Read CMD Delay, tWTR (ns) |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
Minimum Read to Pre-charge CMD Delay, tRTP (ns) |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
7.500 |
Minimum Four Activate Window Delay, tFAW (ns) |
37.500 |
37.500 |
37.500 |
37.500 |
37.500 |
37.500 |
37.500 |
37.500 |
Maximum Average Periodic Refresh Interval, tREFI (us) |
7.813 |
7.813 |
7.813 |
7.813 |
7.813 |
7.813 |
7.813 |
7.813 |
Write to Read CMD Turn-around Time Optimizations |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
Read to Write CMD Turn-around Time Optimizations |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
Back 2 Back CMD Turn-around Time Optimizations |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
No adjustment |
System CMD Rate Mode |
1T |
1T |
1T |
1T |
1T |
1T |
1T |
1T |