A memory module is shown against a server-room backdrop, with a magnified inset highlighting its internal components.
CXMT says it will ship a server DDR5 module built on a new memory-cell layout before the end of 2026. That is a roadmap claim, not a shipping product. Server buyers, PC builders and anyone watching DRAM supply should read it with that in mind.

A memory module is shown against a server-room backdrop, with a magnified inset highlighting its internal components. What CXMT announced​

CXMT, China's leading memory chipmaker, plans to launch a next-generation DDR5 RDIMM server memory chip using 4F² DRAM architecture by the end of 2026. Company President Cao Kanyu said so at an industry conference. The venue was the 4th Integrated Chip and Chiplet Conference in Shanghai. Cao gave a broad presentation on CXMT's work in DRAM devices, 4F² architecture and hybrid bonding. He said the company expects to launch a new generation of DDR5 RDIMM products by year-end that integrate these technologies.

The limits matter. Coverage of the announcement notes that specific product details remain undisclosed. I found no published capacity, speed, voltage, rank configuration, sampling status or customer qualification for the module. "Plans to launch" is not the same as volume availability.

What 4F² means​

DRAM cells are described by their area in units of F², where F is the minimum feature size. The current industry-standard cell architecture is 6F². The 4F² approach reduces cell area from 6F² to 4F², which increases density. One report puts the shrink at roughly 33 percent at the same feature size, and says it requires new transistors.

TweakTown and other outlets say the change could raise cell density per chip by 30 to 50 percent. Treat that as a claimed potential. Module capacity also depends on die design, peripheral circuitry, packaging and manufacturing yield, so cell density alone doesn't tell you how big a DIMM will be.

The company's stated approach centers on its own vertical surrounded-gate (VSG) transistor. Cao said it uses a vertically wrapped channel structure that gives stronger gate control. He says this addresses leakage current and short-channel effects. These are the problems that make shrinking DRAM cells hard. I haven't seen independent measurements of how well it works.

The Samsung comparison​

The "two years ahead of Samsung" line comes from Wccftech's reading that CXMT's 2026 target is around two years ahead of Samsung's roadmap for the architecture. Samsung reportedly intends to produce memory products on 4F² in 2028.

That is a comparison of reported target dates. It does not show that CXMT will have a qualified, high-volume product first. Wccftech also says CXMT's initial version will likely be a partial derivative on the new 15nm G5 process. That is the outlet's expectation, not something CXMT confirmed.

Samsung is not standing still on related technology. DigiTimes reported on September 29, 2026 that Samsung is reshaping its DRAM roadmap. The report says it is elevating B1b wafer-to-wafer hybrid bonding to the core technology behind D0a, its first sub-10nm DRAM. The rest of that article is paywalled, so I can't say what it states about 4F² timing.

Peer-reviewed work shows the technique is feasible in a lab. A Samsung-authored paper at ISSCC 2026 described a 16Gb SDRAM test chip with a vertical-channel-transistor 4F² cell. It used cell-on-peripheral architecture with wafer-to-wafer hybrid copper bonding. The abstract reports read and write operations working and more than 20% more dies per wafer at the same design rules. That is a research demonstration. It says nothing about CXMT's implementation or about volume production.

Why server buyers shouldn't rush​

Server memory is a harder market than consumer DRAM. TweakTown notes that CXMT's customers have mostly been in consumer electronics. An RDIMM uses a register that buffers incoming signals from the CPU. That reduces electrical load and lets operators put more high-capacity modules on one motherboard. Server platforms also need long-term stability and validation with specific CPUs and motherboards.

Before a module like this reaches a rack, it typically needs:

  • Engineering validation, including JEDEC-standard reliability and compatibility testing.
  • Customer sampling and certification.
  • Platform qualification with server makers.
  • A production ramp with acceptable yields.

My brief reports that CXMT's own half-year filing describes a validation flow along these lines. I could not open that filing myself, so treat the detail as unverified here. The same filing reportedly says CXMT already makes DDR5 RDIMMs and MRDIMMs for servers. If so, this announcement is about a new generation, not the company's first server module.

What to watch​

  • Specifications: capacity, data rate and whether the module is based on the G5 process.
  • Qualification: which server platforms and customers certify it.
  • Availability: whether anything is actually sampling or shipping by December 31, 2026.
  • Yield and cost: TweakTown says Samsung's hybrid-bonding route is expensive and years from mass production. CXMT hasn't said how it will handle cost.
  • Market effect: AMD has warned that DDR5 prices won't recover until 2028 as AI demand pulls supply away from consumers, according to TweakTown's related coverage. A credible fourth supplier in server DRAM could matter. It would not change prices in the near term.

Bottom line​

CXMT has publicly committed to a 4F² DDR5 RDIMM by the end of 2026. The 30–50% density figure, the Samsung lead, the patent count and the 300,000 wafers-per-month capacity target are all company or media claims that I couldn't independently verify. IT administrators should treat this as a supplier-competition signal. Plan around real specifications, platform qualification and availability, none of which exist publicly yet.

 

References

  1. CXMT plans to launch 4F² DDR5 server memory by year-end, potentially beating Samsung by two years - TweakTown TweakTown 2026-10-11T21:50:07+00:00
  2. CXMT To Leapfrog Samsung By ~2 Years, As It Gears Up To Introduce A DDR5 RDIMM Product That Leverages The 4F² Memory Cell Architecture Before Year-End wccftech.com
  3. Samsung reshuffles DRAM roadmap, prioritizing B1b hybrid bonding for D0a, HBM5 digitimes.com