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2nm process
About this tag
The 2nm process tag on WindowsForum.com covers developments in semiconductor manufacturing at the 2-nanometer node, with a focus on custom SRAM designs for AI infrastructure. Recent discussion highlights Marvell's 2nm custom SRAM, which promises up to 6 gigabits of on-die capacity, 15% die-area recovery, 66% standby power reduction, and operation at up to 3.75 GHz. These advances signal a shift toward full-stack memory optimization, impacting XPU architecture, on-chip memory hierarchy, and data-center power economics. The content emphasizes the need for independent validation of vendor claims and explores the broader implications for AI hardware and enterprise IT.
Marvell’s announcement that it has developed what it calls the industry’s first 2 nm custom SRAM for AI infrastructure is more than a marketing splash — it’s a signal that memory design is moving from incremental scaling to full-stack, custom optimization, with potential impacts on XPU...