FuriosaAI’s RNGD inference accelerator entered volume production in January, with 4,000 units shipped in its initial run. The company has since moved beyond a prospective hardware launch: Samsung SDS began offering RNGD-backed NPU-as-a-Service on Samsung Cloud Platform in July, while Furiosa has also publicized deployments and integrations with LG AI Research, LG U+, MegazoneCloud and other partners. Those announcements are vendor claims, but they establish a more meaningful milestone than a benchmark slide: Furiosa has crossed from chip design into commercial infrastructure.
That does not make it a Nvidia peer. It does clarify why many Asian chip startups will fail long before their silicon is judged against a GPU.
FuriosaAI’s production run proves the supply chain can be assembled
Tech in Asia reports that FuriosaAI secured TSMC capacity, high-bandwidth memory, packaging partners and customer validation concurrently before moving RNGD into production. Furiosa’s own announcements confirm the most consequential portions of that account: RNGD is made on TSMC’s 5 nm process, uses HBM3 memory, and has been shipped in volume.
The startup also says it works with TSMC, SK hynix and Broadcom, while its January production announcement identified TSMC and Asus in the manufacturing and delivery chain. That combination illustrates the real threshold for an AI accelerator startup. A chip designer can complete a tape-out—the transfer of a finished design to a manufacturer—and still have no product to sell if memory allocations, package assembly, board manufacturing, firmware, server qualification and software support do not arrive in sequence.
The reporting’s $10,000 estimate for one RNGD chip should be treated cautiously. It does not identify the basis of the estimate, and neither Furiosa nor its manufacturing partners have publicly disclosed a per-chip price. In practice, enterprise buyers do not purchase an accelerator in isolation. They assess a qualified card or server, power and cooling requirements, network configuration, the runtime stack, model support, service terms and the risk that a supplier will still be available for the next refresh cycle.
That is why Samsung SDS’s July cloud service carries more weight than an initial hardware shipment. It means an established IT services provider has taken on some of the operational work of deploying and supporting the hardware. For enterprises that want a non-Nvidia option for inference, that reduces a major adoption risk. It does not independently validate Furiosa’s performance or economics against Nvidia across all workloads, but it turns RNGD into infrastructure that organizations can actually consume.
A 5 nm wafer does not equal a deployable AI system
The article frames TSMC’s leading-edge manufacturing capacity as the central choke point, and it is plainly important. TSMC’s 2025 annual report says its 2 nm process entered high-volume manufacturing in the fourth quarter of 2025 and that the company is investing across leading-edge nodes and advanced packaging to meet AI-driven demand. TSMC also operates programs specifically aimed at emerging customers, offering technical guidance on roadmaps, production planning and the path to manufacturing.
But access to a process node does not settle the problem. RNGD’s public specifications put the distinction in plain view: a 5 nm logic chip with HBM3 memory needs a package capable of connecting compute and memory at very high bandwidth. This is a system integration problem, not merely a lithography problem.
TSMC’s CoWoS technology is the best-known advanced packaging method for placing high-performance processors and HBM in the same package, and TSMC itself identifies CoWoS as foundational to high-performance computing and AI products. Demand for the technology climbed sharply with generative AI. Yet Tech in Asia’s description should not be read as confirmation that Furiosa’s RNGD specifically uses CoWoS. Furiosa has publicly confirmed TSMC 5 nm fabrication and HBM3, but it has not publicly identified the advanced packaging technology behind RNGD.
That missing detail matters. A startup can have a wafer allocation and still be delayed by package capacity, substrate availability, HBM qualification, yield issues or the logistics of bringing several suppliers into a validated module. The physical product in a data center is the result of all those steps. Nvidia’s advantage is not simply that it designs powerful GPUs; it has spent years building the manufacturing relationships, packaging volume, board designs, networking portfolio, software tools and buyer confidence required to turn chips into deployable clusters.
HBM suppliers decide which designs can become products
High-bandwidth memory is the more revealing bottleneck because it cannot be bought casually by a startup with a promising architecture. HBM has to be allocated, qualified and integrated. Suppliers also have strong reasons to prioritize customers whose product plans, volume forecasts, payments and packaging arrangements are credible.
Furiosa’s public materials identify SK hynix as an HBM partner, and that relationship is a signal of manufacturing maturity. It is not just a component purchase. The memory supplier’s participation helps unlock the rest of the design’s path toward a shippable accelerator.
For smaller chip companies, the problem is circular. They need customer commitments to make a compelling case for memory and packaging supply; yet customers may hesitate until they know the chip will be manufactured, supported and available in volume. Silicon Box’s reported screening criteria make commercial sense in that light. Before committing packaging capacity, the company wants evidence of technical competence, founders’ execution history, supply-chain support and real demand. It is underwriting the startup’s ability to finish the product, not simply judging an architectural concept.
This explains why well-funded teams can remain stranded. Semiconductor financing is expensive, but capital alone is not a reservation system for scarce capacity. A $100 million round may cover engineering, software development, tape-out and early operations, while still leaving the company dependent on partners that must decide whether its product merits scarce HBM and advanced-packaging resources.
Nvidia’s moat extends well past GPU performance
The practical obstacle for a buyer is not whether a startup can claim better performance per watt on a single model. It is whether the alternative can run the organization’s models, tools and operational procedures with predictable support. Nvidia’s CUDA platform, libraries, frameworks, networking products and extensive server-vendor support all lower the cost of choosing Nvidia again.
Furiosa is taking a narrower route. RNGD is designed for AI inference, where a specialist accelerator can focus on serving trained models efficiently rather than covering every training and general-purpose compute workload. That focus gives startups a plausible opening, particularly when electricity, sovereign-computing requirements or operating cost matter more than retaining an all-Nvidia stack.
Furiosa has claimed efficiency advantages in selected tests, including against older GPU platforms and, more recently, against Nvidia’s RTX PRO 6000 in a Qwen3 workload under a specified service-level target. Those are useful indications of intent, but they are not a universal comparison. Enterprises should ask for tests using their model, quantization scheme, batch size, latency target, orchestration layer and utilization profile. A chip that is efficient for a specific inference service can be a poor fit for a mixed fleet, an unported model or a workload that needs mature multi-node scaling.
The commercial evidence is more important than a headline benchmark. LG AI Research adopted RNGD for EXAONE-related enterprise uses, and Samsung SDS now offers a cloud service based on the accelerator. Those deployments suggest that non-Nvidia AI infrastructure can reach production when a startup has both silicon and local institutional partners. They do not show that a new accelerator can displace Nvidia across hyperscale training or broadly replace its software platform.
Edge AI is Asia’s more realistic near-term opening
The reporting correctly identifies a more achievable path for much of South-east Asia and India: chips for edge AI and constrained workloads rather than direct competition for frontier data-center accelerators. A 12 nm chip for cameras, robots, industrial equipment, drones or on-premises gateways does not necessarily require the same leading-edge wafer supply, HBM allocation or advanced package complexity as a 5 nm data-center processor.
That changes the economics. Mature-node foundries can offer more manufacturing choices, and a specialized chip can differentiate through latency, power draw, ruggedness, privacy or workload-specific software. OptoML’s effort to deploy chips for CCTV, drones and robotics is an example of a strategy that starts where local customers can validate the product before attempting a data-center leap.
For Windows and enterprise IT teams, this means the first meaningful alternatives will often appear as appliances, edge systems or cloud offerings with a narrowly defined inference stack—not as a drop-in replacement for an existing Nvidia cluster. Procurement should therefore focus on integration: supported model runtimes, drivers, container images, monitoring, failover behavior, security updates, server availability and the vendor’s ability to keep supplying the hardware.
Asia’s chip startups are not blocked from challenging Nvidia because they lack capable engineers. FuriosaAI’s move from TSMC-made silicon to a Samsung SDS cloud service shows that a startup can assemble the required supply chain. But the route is so capital-intensive and partner-dependent that the winners will be the companies that secure memory, packaging, software adoption and anchor customers before their first large production order—not merely the ones that design an impressive chip.
