This piece covers what the analysis says, what AMD's newly published specifications confirm, and where the predictions end and the evidence begins.
First, the verified hardware baseline
Some confirmed facts first. There are 31 parts across the two sockets: nine for SP7, the 16-channel flagship platform, running from a 64-core CPU at $8,008 to the 256-core EPYC 9996 at $14,904, and 22 for SP8, the 8-channel enterprise socket, running from an 8-core EPYC 9016 at $700 to a 128-core EPYC 9746 at $11,679. The schedule hasn't changed: SP7 systems in the fourth quarter of this year, SP8 systems in the first half of 2027.
Two more product lines come later. According to Phoronix, the lineup includes EPYC 9006X SP7 for the Venice-X 3D V-Cache processors that will debut in 2027, and AMD EPYC 9006 LP "Verano" is also on the way for EPYC Zen 6 with LPDDR memory in the second half of 2027.
The published pages also settled the I/O question. Every SP7 part is listed at PCIe 6.0 x96, and all SP8 CPUs at x128. ServeTheHome reads this as the EPYC 9006 SP8 family is being positioned as the better processor for customers who need extra I/O bandwidth over additional memory bandwidth or CPU cores.
Section summary: SP7 is the high-density flagship arriving this quarter. SP8 is the cheaper, I/O-heavy enterprise socket arriving next year. 9006X and Verano follow in 2027. AMD labels the full list subject to change.
The big caveat: nobody buys an AI rack one CPU at a time
Kennedy's first point is really a disclaimer. Integrated accelerator racks are designed as complete platforms. He expects Helios buyers to get EPYC 9006. Buyers of NVIDIA's Rubin NVL72 racks will almost certainly get NVIDIA's own Vera CPU, not Venice. Nobody picks a CPU à la carte for a rack like that.
He also doesn't expect most enterprises to deploy Helios or NVL72 racks. He thinks they will buy PCIe GPU servers, and says he has heard that a few Fortune 50 companies can cover their internal AI load, excluding cloud APIs, with roughly 1,000 PCIe GPUs. That figure is secondhand reporting, not a measured benchmark.
AMD has done well in PCIe-GPU hosts, Kennedy says. The weak spot has been the 8-channel, two-DIMMs-per-channel design that Intel pushed with Xeon 6. He says SP8 gives AMD a direct answer for 32-DIMM configurations, and that AMD will have both SP7 and SP8 for GPU hosting, a better fit than the current EPYC 9005 "Turin" SP5 platform.
Agent execution nodes: density vs. speed
This is where Kennedy expects the hardest competition: NVIDIA Vera, Intel Xeon (helped on supply by Intel's own fabs), Arm-based designs, hyperscaler in-house silicon and, from 2028, Qualcomm's Dragonfly C1000. He expects RISC-V offerings between 2028 and 2030.
He splits buyers into two groups.
Camp one: pack in the cores
These buyers want the lowest cost and lowest power per agent. Taking Meta Muse's two-vCPU environments as the example, ServeTheHome gives these power figures per two vCPUs (its own calculations):
| Processor | Approx. power per 2 vCPUs |
|---|---|
| 512-thread EPYC 9006 SP7 | Just over 2.3W |
| Intel Clearwater Forest (288 cores, 450W) | Just over 3.1W |
| AmpereOne M (192 cores) | ~3.6W |
| Arm Neoverse V2 chips | Close to 7W |
We checked the AMD number against the published spec sheet. The flagship has 256 cores and 512 threads, a 2.55 GHz base clock, up to 4.1 GHz boost and 1GB of L3 cache, and its Default CPU Power is rated at 600W with a configurable range between 400W and 600W. 600W divided by 256 cores is about 2.34W per core, which matches ServeTheHome's "just over 2.3W." The Clearwater Forest figure also checks out: 450W over 288 E-cores is about 1.56W per core, or about 3.1W for two single-threaded cores.
These are nameplate power numbers divided by core count. They are not wall-socket measurements of a real agent workload. A lower-power 256-core part was mentioned earlier, but StorageReview notes that the 400W EPYC 9956, the 256-core CPU AMD used in its rack-density endnotes in July, has no product page yet; either it arrives later, or the density case now rests on the 600W 9996. If the 9956 does ship, the per-core power math improves a lot.
Camp two: fewer, faster cores
Other buyers want the fastest cores available, with more memory bandwidth per core. Kennedy says this is the market NVIDIA Vera targets, and AMD will compete with its 96-core variants. The SKU list confirms three 96-core models, including the EPYC 9686F with a boost clock of up to 5.0 GHz.
No head-to-head comparison exists yet. Kennedy says ServeTheHome hopes to test Vera against Venice in its own controlled lab once it gets the parts. Until then, anyone who tells you who wins is guessing.
Orchestration and general-purpose compute
Kennedy admits he had underrated orchestration nodes: the servers that place users on machines, collect billing data, run Kubernetes clusters and handle workflows. He sees SP8 as a natural fit in enterprise and colocation data centers, with SP7 or SP8 in AI factories and hyperscale sites.
General-purpose compute, including the virtualization hosts many readers run, is the category he calls "a huge one." His argument: agents query services around the clock at higher rates than people, so legacy applications, databases and storage will take on significantly more load. Companies that have stretched CPU server lifecycles to pay for GPU servers will eventually have to refresh, and he suspects that is less than two years away.
He expects AMD to have the clear upper hand for x86 software this generation. The main reason is the stack's range, from 16 to 512 threads per socket. This is an informed forecast. There is no measured demand curve behind it yet.
Section summary: If AI pilots are already driving up API calls against your file servers, SQL instances or line-of-business apps, ServeTheHome's point is that the refresh bill may land on your ordinary infrastructure, not only the GPU budget.
Per-core licensing: the Windows Server angle
Kennedy treats per-core licensed software as its own category. It is largely x86 software, which he says favors EPYC. He names SQL Server, Windows Server and VMware, and says AMD's F SKUs are designed for this use. He also says AMD SKUs are popular in cloud EDA, where the goal of top performance per core matches what database administrators want.
The new SKU list includes a part that seems built for this. Tom's Hardware points to the 16-core EPYC 9176F, which features a massive 192MB of L3 cache, 4X that of the 16-core EPYC 9116, while costing more than 3X as much. The publication concludes that with its high cache capacity and 5 GHz boost clock, AMD likely designed the EPYC 9176F for organizations seeking to minimize licensing costs for software priced per core. The broader SP8 lineup has models with 16, 24, 32, 48, 64 and 96 cores, all reaching up to 5.0 GHz.
A practical note from general licensing knowledge, not from the reporting above: Windows Server Standard and Datacenter are licensed per physical core with a 16-core minimum per server. A single-socket 16-core F part lines up exactly with that minimum, so you pay for no cores you can't use. Check current licensing terms with your reseller, since Microsoft's rules for virtualization and SQL Server have their own details.
Tom's Hardware also points out SP8 models with the "P" suffix, which indicates support for single-socket systems only, and says the 32-core EPYC 9356P retails for 26% less than the EPYC 9356. For licensing-sensitive single-socket hosts, those savings add up.
Then Kennedy speculates. If agents push usage to five or ten times current levels, and licenses and hardware have to scale with it, he sees "an enormous incentive" to move off per-core-licensed software. He predicts agent-driven tools that migrate workloads to open-source alternatives or build custom replacements. Treat this as a thought experiment. No survey, pricing analysis or observed migration trend supports it yet. It is still a fair question for anyone renewing an Enterprise Agreement: does your licensing model assume a human-sized workload?
HPC and specialty compute
The last category is HPC. Kennedy notes that oil and gas and biotech companies run HPC clusters and also do large-scale AI work. He argues that agent-driven research could increase demand for traditional high-precision simulation, because teams can design high-value experiments faster. He sees the V-Cache-equipped 9006X as built for this. ServeTheHome previously reported that Venice would likely appear in next-generation HPE Cray nodes, first shown at SC25.
The bottom line
Kennedy concludes that AMD will compete in almost every compute category. His own caveat is that this assumes non-NVIDIA GPUs in most cases. A fair reading:
- Verified: the SKU stack, pricing, PCIe lane counts, core counts and launch windows.
- Reasonable forecasts: SP8 as the enterprise GPU host and orchestration workhorse, and F-series chips for per-core-licensed Windows Server and SQL Server hosts.
- Unproven: any Venice-vs-Vera performance claim, the scale of agent-driven infrastructure demand, and the idea that per-core licensing is in trouble.
For Windows admins planning 2027 refreshes, the practical takeaway is simple. Watch the SP8 F-series and P-series parts when systems ship in the first half of next year, and start measuring how much agent traffic your existing servers are already carrying. The next part of the ServeTheHome series covers storage, where Kennedy also expects agents to add load.
References
- Where We Expect AMD EPYC 9006 CPUs in the era of Agentic AI - Page 2 of 4 ServeTheHome · 2026-09-29T17:00:59+00:00
- AMD Posts the Full EPYC 9006 SKU List: 31 Venice Parts From $700 to $14,904 Across SP7 and SP8 storagereview.com
- AMD Takes the Lid off of Next-Gen EPYC 9006 Venice As Zen 6 Comes to Servers - Page 2 of 4 - ServeTheHome servethehome.com