The important correction is in the memory claim. The NANO-X100 does not use upgradeable desktop DDR5 or SO-DIMM memory: IEI describes onboard LPDDR5X, with 64 GB on the demonstrated configuration and up to 128 GB on selected SKUs. That makes the memory capacity impressive for a board this size, but it also means buyers must choose their RAM configuration at purchase. There is no field upgrade path after an AMR controller, vision appliance, or compact Windows edge system has been deployed.
For Windows administrators and developers, the promise is familiar: a compact x86 computer that can run conventional desktop-class software while keeping CPU, Radeon graphics, and an NPU on one package. What is still missing is at least as important as the board’s headline specifications. IEI has not named the exact Ryzen AI Embedded X100 models it will ship in the NANO-X100, published pricing, announced a volume-availability date, or provided a Windows driver and OS-support matrix.
The 16-core figure belongs to AMD’s platform, not every board
Notebookcheck’s “16-core Ryzen APU” headline reflects the top end of AMD’s Ryzen AI Embedded X100 family. AMD’s published X100 lineup includes the 16-core Ryzen AI Embedded X199 and industrial-temperature X199i, along with 12-core X188/X188i and eight-core X168/X168i options. The X199-class chips pair 16 Zen 5 CPU cores with 40 RDNA 3.5 graphics compute units and an XDNA 2 NPU rated for up to 50 TOPS.
IEI has said only that the NANO-X100 uses an X100-series processor. Its July announcement described the board as an edge-AI foundation and claimed up to 50 TOPS of dedicated NPU performance, but did not attach a processor SKU to a shipping board configuration. That distinction prevents anyone from assuming that every NANO-X100 will be a 16-core X199 system with the flagship GPU configuration.
AMD’s product positioning makes the uncertainty meaningful. The company introduced the X100 family for demanding physical AI and autonomous-system workloads, with X100 sampling expected during the first half of 2026. Tom’s Hardware reported in July that AMD positioned the X199 as a Strix Halo-class embedded part, citing up to 16 cores, 40 GPU compute units, 50 NPU TOPS, and up to 128 GB of unified memory.
The NANO-X100 is therefore best understood as an industrial integration of that silicon rather than a newly invented processor platform. IEI’s contribution is the board-level design: compact dimensions, power delivery, expansion, Ethernet, legacy serial interfaces, cooling, and the ability to place the resulting computer inside machinery that cannot accommodate a mini-ITX PC and a discrete GPU.
Onboard LPDDR5X changes the buying decision
The board’s maximum 128 GB memory capacity is its standout specification, especially at EPIC size. AMD’s own X100 material describes the family as supporting up to 128 GB of unified memory, which CPU and integrated GPU workloads share. That can be valuable for local inference, multi-camera video processing, large image buffers, graphics pipelines, and model workloads that exceed the VRAM available on compact discrete GPUs.
But memory is not merely a capacity number here. IEI’s NANO-X100 announcement specifies 64 GB of onboard LPDDR5X in the initial configuration, with 128 GB available on selected SKUs. AMD’s X100 documentation identifies LPDDR5X-8533 as a platform capability. Since the RAM is soldered to the board, integrators cannot start with 64 GB and add capacity later when a vision model, video-retention workload, or Windows application grows.
That is a practical advantage in industrial installations as well as a limitation. Removing socketed DIMMs eliminates one serviceable component that can work loose or oxidize in vibration-prone deployments. It also puts more pressure on up-front capacity planning. A plant that needs 128 GB for a video-analytics model or a local database should procure it from day one, along with spares carrying the same configuration.
The memory language also exposes why calling the product a conventional SBC can be misleading. A typical low-cost SBC is defined by an inexpensive Arm SoC, modest memory, and an SD-card-oriented software experience. The NANO-X100 is closer to an embedded workstation motherboard with fixed memory and an AMD laptop-class heterogeneous processor. Its deployment model will resemble an industrial PC: validate the OS image, lock the BIOS settings, qualify storage and wireless modules, and retain an identical replacement-board inventory.
The I/O mix targets factory equipment and machine vision
IEI’s published NANO-X100 specifications list four external USB 3.2 Gen 2x2 Type-A ports, HDMI and DisplayPort outputs, two 2.5GbE ports, an I2C header, four RS-232 connections, and two serial interfaces configurable for RS-232, RS-422, or RS-485. Three M.2 slots are allocated for a 2230 wireless card, 2242/2280 storage, and 3052 cellular hardware.
The dual 2.5GbE ports are more consequential than they initially appear. They allow an integrator to physically separate an operational network—such as cameras, PLC-adjacent equipment, or a robot cell—from an upstream IT network without relying immediately on a USB Ethernet adapter or a second compact computer. That separation is not a security boundary by itself; Windows firewall policy, VLAN design, credential management, and update controls remain necessary. It does, however, give appliance designers the physical interfaces needed to build separate network paths into the chassis.
The serial ports also make clear that IEI is serving customers who have not replaced every field device with Ethernet. RS-232, RS-422, and RS-485 remain common around industrial controllers, sensors, barcode systems, and legacy machinery. Consolidating those interfaces, camera-class USB bandwidth, NVMe storage, wireless or cellular expansion, and two Ethernet ports into a small board could eliminate several interface adapters in a production system.
LinuxGizmos independently summarized the preliminary board data as a 115 × 165 mm platform with 64 GB LPDDR5X, dual 2.5GbE, triple M.2, display outputs, and serial connectivity. The specification set aligns with IEI’s earlier event announcement and Notebookcheck’s report, although the public material is still preliminary rather than a final manual with lane maps, storage compatibility lists, and electrical limits for every connector.
Windows is plausible, but certification remains unproven
AMD’s Ryzen AI Embedded software pitch explicitly spans operating-system domains. In its January introduction, AMD described a Xen-hypervisor-based approach in which Yocto or Ubuntu can run an HMI, FreeRTOS can handle real-time control, and Android or Windows can support richer applications in parallel. That is a platform statement, not confirmation that IEI has certified a particular NANO-X100 Windows image.
For an organization considering Windows 11 IoT Enterprise, Windows 11 Pro, or a custom Windows deployment, the unanswered questions are concrete:
- IEI has not yet published which Windows editions and releases it supports on the NANO-X100.
- There is no public driver package or validation guide covering the chipset, dual Ethernet controllers, graphics, NPU, serial hardware, Wi-Fi modules, or cellular expansion.
- IEI has not published its firmware-update process, TPM configuration, secure-boot defaults, remote-management options, or hardware lifecycle commitments for this board.
- The company has not disclosed thermal limits, cooling requirements, or sustained-power settings for each X100 processor option in the NANO-X100.
Those omissions do not mean Windows support will be absent. The Ryzen AI Embedded X100 platform is x86, and AMD explicitly includes Windows among supported richer-application environments. But sysadmins should not confuse CPU architecture compatibility with a validated appliance stack. A production deployment needs tested drivers, recovery media, a reproducible BIOS configuration, and a support commitment that outlasts the device’s expected field life.
The NANO-X100’s actual attraction is that it could make this validation worthwhile. A single board may replace a compact PC, a low-end GPU, a USB serial rack, a pair of network adapters, and separate wireless or cellular hardware in constrained equipment. The trade-off is that the board has to be treated as specialized infrastructure, with the same image-management and spare-parts discipline applied to an industrial PC.
Availability, price, and final configuration are still the story’s missing pieces
IEI has moved the NANO-X100 from a July trade-show demonstration to a public preliminary specification, but it has not yet turned that disclosure into a normal retail product announcement. No public price has been posted, and no mass-production or channel-availability date has been announced. The board is likely to be sold through industrial distributors and systems integrators rather than consumer retailers.
The public record also stops short of confirming whether purchasers can freely select the eight-, 12-, or 16-core X100 parts, how the 64 GB and 128 GB memory options map to those CPUs, and whether active cooling is standard across all configurations. Those details will determine whether the NANO-X100 lands as a broadly configurable embedded platform or a small number of tightly controlled SKUs.
For now, the actionable takeaway is simple: the NANO-X100 is a serious x86 edge-computing board whose 128 GB maximum is soldered LPDDR5X, not upgradeable DDR5, and whose 16-core capability depends on the X100 chip IEI ultimately offers. Until IEI supplies final SKU, operating-system, thermal, and pricing documentation, it is a board to evaluate through a vendor sample program—not one to standardize into a Windows fleet on the strength of a specification page alone.