NVIDIA’s Vera Rubin NVL72 carries 74.7 TB of directly attached HBM4 and LPDDR5X memory per rack, a figure NVIDIA itself confirms — but the detailed bill-of-materials math behind Wccftech’s claim that memory makes up 62% of a $38,902 “Superchip” does not add up.

The Wccftech report, citing a UBS analysis and a report from Chosun Biz, says memory costs $24,297 of a $38,902 Vera Rubin Superchip, compared with a 53% memory share in Grace Blackwell. NVIDIA’s published Vera Rubin specifications confirm the hardware density described in the story: 72 Rubin GPUs with 288 GB of HBM4 apiece, plus 36 Vera CPUs with 1.5 TB of LPDDR5X each. That produces 20.7 TB of HBM4 and 54 TB of CPU-attached LPDDR5X, or 74.7 TB in total.

But NVIDIA’s own configuration table also establishes the point that breaks the cost calculation: one Vera Rubin Superchip consists of two Rubin GPUs and one Vera CPU, not one GPU and one CPU. Once that is applied to the component prices quoted by Wccftech, memory reaches roughly $29,241 per Superchip, or about 75% of the stated $38,902 component total — not $24,297 or 62%.

That does not make the larger conclusion wrong. Vera Rubin is plainly a machine built around extraordinary quantities of memory, and memory procurement is becoming a first-order constraint for AI infrastructure. It does mean readers should not repeat the 62% figure as a settled UBS finding without seeing the original model and its definitions.

Infographic of a liquid-cooled AI supercomputer with 72 GPUs, 36 CPUs, and 74.7 TB memory.The rack specifications are real; the cost mix is not reconciled​

NVIDIA says the NVL72 rack has 72 Rubin GPUs and 36 Vera CPUs. Each GPU includes 288 GB of HBM4 at up to 22 TB/s of bandwidth, while each Vera CPU supports 1.5 TB of LPDDR5X. NVIDIA also lists 576 GB of HBM4 and 1.5 TB of LPDDR5X at the Superchip level, which is consistent with two GPUs paired with one CPU.

The arithmetic is straightforward:

  • 72 Rubin GPUs × 288 GB of HBM4 equals 20.736 TB of HBM4.
  • 36 Vera CPUs × 1.5 TB of LPDDR5X equals 54 TB of LPDDR5X.
  • Together, those pools total 74.736 TB, ordinarily rounded to 74.7 TB.

Wccftech’s cost inputs describe a Rubin GPU at $9,247, including $4,943 for its HBM4, and a Vera CPU at $20,059, including $19,355 attributed to SOCAMM2 LPDDR5X. The report then says a $38,902 Superchip contains $24,297 in memory. That number is simply $4,943 plus $19,355: one GPU’s HBM4 and one CPU’s LPDDR5X.

Yet the same report correctly describes a Superchip as two GPUs plus one CPU. Using its own component figures, a fully counted Superchip would contain two lots of $4,943 HBM4 plus $19,355 of SOCAMM2 memory, totaling $29,241. The purported $38,902 Superchip BOM also supports that layout: two $9,247 Rubin GPUs plus a $20,059 Vera CPU and roughly $350 in board components reaches $38,903, effectively the reported total after rounding.

The missing second GPU memory allocation is material. It changes the memory share from 62.5% to approximately 75.2%.

It also means the story’s “2.1 times overall cost versus predecessor, but 2.5 times memory cost” comparison cannot be evaluated from the published figures. Wccftech does not provide the corresponding Grace Blackwell component table, its definitions of memory, or the original UBS methodology. No public NVIDIA price list or bill of materials substantiates those exact figures.


A rack BOM and a Superchip BOM are different stories​

There is a second source of confusion: a Superchip-level component cost should not be treated as the bill of materials for an NVL72 rack.

Multiplying the stated $38,902 Superchip BOM by 36 yields about $1.4 million in compute-board components. That leaves out a substantial share of a rack-scale system: NVLink switching, ConnectX-9 networking, BlueField-4 DPUs, power delivery, liquid cooling, storage, chassis integration, cabling or backplane hardware, manufacturing, validation, support arrangements, and NVIDIA’s margin.

That distinction is visible in separate reporting on a Morgan Stanley estimate. Tom’s Hardware reported in May that Morgan Stanley put the cost of a VR200 NVL72 at about $7.8 million, with roughly $2 million attributed to memory and storage-related content. On that model, memory represents about 25% of a complete rack’s cost, not 62% or 75%.

Those figures do not necessarily contradict the corrected Superchip math. They measure different things.

The Wccftech/UBS numbers appear to be attempting to isolate the compute board: HBM4 on the GPUs and SOCAMM2 LPDDR5X around the CPU. The Morgan Stanley estimate, as reported by Tom’s Hardware, covers a complete rack and includes expensive 3D NAND storage as part of its memory bill, along with the extensive non-memory hardware that makes an NVL72 deployable.

The practical conclusion is narrower and stronger than the headline: memory can dominate the cost of the compute module while remaining a minority of the cost of a finished rack. Both can be true. Conflating them is what produces eye-catching percentages that do not travel well between analyses.

SOCAMM2 is the expensive part people should watch​

HBM4 is the obvious cost center because it is packaged alongside the Rubin GPU and delivers a major bandwidth increase over Blackwell-era HBM3E. But the Wccftech figures point to an equally consequential change: the Vera CPU’s 1.5 TB LPDDR5X allocation.

At the reported $19,355, the SOCAMM2 memory accounts for almost all of the alleged $20,059 Vera CPU cost. Even allowing for the fact that the estimate has not been published by UBS or NVIDIA, it captures the architectural shift. Vera is not a conventional host CPU with a comparatively modest DRAM footprint. NVIDIA has designed a CPU side of the system with 1.5 TB of local low-power memory per socket and 54 TB across the rack.

That design helps explain why capacity matters alongside bandwidth. HBM4 feeds the accelerators; the much larger LPDDR5X pool supports the CPUs, software stack, data preparation, orchestration, and the large working sets associated with inference systems handling long contexts and agent-style workloads. NVIDIA has also promoted an Inference Context Memory Storage Platform, making clear that the company views memory hierarchy — HBM, LPDDR and storage — as part of the product rather than a background component choice.

For systems buyers, SOCAMM2 is also less interchangeable than ordinary server DIMMs. It is a specific module format tied to NVIDIA’s platform design, with service procedures, qualified suppliers, lead times, and replacement inventory that will matter to OEMs and hyperscalers. A rack with 54 TB of that memory is not merely a large DRAM purchase; it is a supply-chain commitment to a specialized platform component.


The smartphone comparison obscures the useful comparison​

Wccftech’s claim that one rack holds the memory equivalent of roughly 4,500 smartphones is numerically plausible only if the comparison assumes around 16 GB per phone. Dividing 74.7 TB by 4,500 produces about 16.6 GB per device.

But it is a poor planning metric. A phone’s LPDDR package is not HBM4, does not use SOCAMM2, and does not compete for the same packaging, validation, or supply-chain capacity in the same way. The more useful comparison is between generations of AI racks and their memory classes.

Vera Rubin’s 20.7 TB of HBM4 is a direct consequence of 72 GPUs carrying 288 GB each. Its 54 TB of LPDDR5X reflects the 36 Vera CPUs carrying 1.5 TB each. Those are the quantities that affect HBM stack supply, LPDDR wafer allocation, advanced packaging throughput, board design and repair logistics.

The claim that this single platform explains a worldwide DRAM shortage goes further than the public evidence supports. NVIDIA’s demand is large, and long-term supply agreements can prioritize major AI customers, but Wccftech does not identify the “BIG 3,” quantify supply shortfalls, or provide a forecast model showing that shortages will persist for years. Memory pricing is cyclical and segmented; HBM4, server LPDDR5X, DDR5, mobile LPDDR, and consumer DIMM markets can tighten or loosen for different reasons.

What IT buyers should take from Vera Rubin​

Vera Rubin is now a production platform, not a distant roadmap slide. NVIDIA has said the NVL72 is shipping in the second half of 2026, while Chosun Biz reported in July that systems had reached customers including Google Cloud, Microsoft Azure, Oracle Cloud and CoreWeave. Those deployments will put the rack’s memory architecture under real operational scrutiny rather than presentation-stage assumptions.

For Windows administrators, the immediate impact is mostly indirect. Few enterprise Windows environments will buy an NVL72 as a standalone asset, and the rack does not change the RAM requirements of Windows Server, Hyper-V, SQL Server, or ordinary endpoint fleets. The operational effect arrives through cloud capacity, GPU-instance availability, AI service pricing, and the component allocations made by OEMs and memory suppliers serving data-center customers first.

The number worth retaining is 74.7 TB, because NVIDIA confirms it. The percentage worth discarding is 62%, because the published component figures omit the HBM4 attached to the second Rubin GPU in every Superchip. As Vera Rubin shipments scale, the real constraint will be less about a viral memory-per-smartphone comparison and more about whether HBM4 stacks, SOCAMM2 modules, advanced packaging, storage, cooling and network hardware can all arrive together in rack-scale quantities.