That distinction is important for anyone evaluating the project as a template for a home NAS, small server, or Windows-adjacent lab machine. This is not an ordinary drop-in CPU upgrade, nor is the CM5 itself a standalone motherboard. It is a bespoke ARM-based platform that happens to make unusually good use of a compact, purpose-built server enclosure.
What has changed inside the MicroServer
The original HP ProLiant MicroServer N40L was built around AMD’s Turion II Neo N40L processor running at 1.5 GHz. HPE specified two slots for PC3-10600E unbuffered DDR3 ECC memory, with 8 GB as the maximum supported configuration. Its platform also included embedded SATA RAID 0/1 and a 150 W non-redundant power supply.
EastMakes’ project removes that original motherboard-level platform. The builder described taking the Compute Module 5 IO Board reference design and turning it into a custom motherboard specifically for the N40L chassis. In other words, the project keeps the enclosure and adapts a modern embedded computer platform to it; it does not preserve the N40L’s AMD processor, memory, onboard SATA controller, or original motherboard.
The finished board reportedly includes an M.2 NVMe SSD, Ethernet and USB ports arranged to meet the case’s existing rear I/O openings, and a white 24-pin power connector intended to connect to the old power supply. The board also has front-edge switches labelled “Boop” and “Re-Boop,” an appropriately playful reminder that this is a custom-maker project rather than an official HPE replacement assembly.
This is a better description of a chassis conversion than a revival of the original server hardware. That is not a criticism. Retaining a well-designed enclosure, its physical layout, and potentially its power and cooling infrastructure can be more useful than discarding the entire system. But it does alter what users should expect from it.
Why CM5 needs a custom carrier board
The Raspberry Pi Compute Module 5 is not a connector-equipped Raspberry Pi motherboard. Raspberry Pi describes it as similar to a Raspberry Pi without the physical connectors, with the companion CM5IO carrier supplying those connections. That makes it suitable for custom embedded designs, but it also means the carrier board determines much of the completed system’s I/O, power design, mechanical arrangement, and expansion path.
At its core, CM5 includes a quad-core 2.4 GHz Cortex-A76 processor, integrated Gigabit Ethernet PHY, and one PCIe Gen 2 ×1 host interface. Those specifications make it a substantially different class of platform from the N40L’s older AMD system. However, they do not, by themselves, establish a measured performance lead in any particular workload.
No supplied CPU, memory, network, storage, thermal, power-use, or real-world application benchmarks compare the custom CM5 system with the stock N40L. A claim that it delivers a major performance upgrade would therefore be plausible in some tasks but unproven by the available evidence. Clock speeds alone cannot compare processors of different designs, architectures, and generations, and server usefulness depends heavily on the workload, storage topology, software stack, and sustained stability.
For Windows and PC enthusiasts, architecture is another major dividing line. The original system used an AMD x86 processor; the replacement is ARMv8-based. The available project information does not identify an operating system, boot arrangement, or application stack. It consequently provides no basis to promise a particular Windows installation experience, Windows application compatibility, driver availability, virtualization workflow, or migration route from software used on the original machine. Treat it as a custom ARM server build, not as an x86 MicroServer with newer internals.
NVMe is useful, but expansion is tightly bounded
The M.2 NVMe SSD is among the most consequential parts of the build. Raspberry Pi’s CM5IO reference design provides an M.2 M-key PCIe socket for NVMe SSDs, and EastMakes’ design follows that general platform approach.
The ceiling is important: CM5 exposes one PCIe Gen 2 ×1 host link, documented at 5 Gb/s. The CM5IO design’s default M.2 connection is likewise PCIe Gen 2 ×1. That is a useful interface for solid-state storage in a compact server, but it is not comparable to the multi-lane PCIe connections common in recent desktop or server systems. The available PCIe link is shared at the platform-design level: a custom carrier based on CM5 has only that one host connection unless the designer adds switching or makes another design change.
That affects both expectations and future expansion. An NVMe drive can provide a responsive boot and application volume, but the project does not establish its actual throughput, latency, boot source, or sustained behavior. The exact SSD model is also undocumented. More importantly, using the lone PCIe lane for NVMe limits straightforward access to other PCIe-attached hardware.
The four front drive bays are the central reason many people still appreciate the N40L chassis, but their present role in this build should not be overstated. The builder indicated that the installed SSD could later be removed and replaced with an M.2-to-SAS adapter when hard-drive prices normalize. This suggests a possible path to reconnecting the enclosure’s drive bays, but it is not evidence that the current configuration operates a four-drive SATA or SAS backplane.
That distinction has real consequences for a NAS plan. A single NVMe-based setup can be useful for a lightweight server, but it is not the same as a documented multi-drive storage appliance with established drive-bay connectivity. An M.2-to-SAS option could be compelling, but it would also place storage expansion behind the same single PCIe Gen 2 ×1 host interface and requires an implementation not yet documented here.
The power integration is clever, not yet verified
The white 24-pin connector is one of the most visually persuasive aspects of the conversion. It is reportedly intended to connect the custom board to the N40L’s existing power supply, potentially avoiding a loose external power brick and helping the converted machine retain the tidy, appliance-like quality of the original chassis.
Yet electrical integration is the area where visual success should not be mistaken for validation. Raspberry Pi’s reference CM5IO design is designed around external 5 V input. The available material does not include the custom board’s full schematic, its voltage-rail design, component list, conversion details, or sustained-load electrical measurements. There is also no independent rail analysis confirming that the connector safely and correctly supplies the carrier’s requirements through the original server PSU.
That does not mean the implementation is faulty. It means outside observers do not currently have enough evidence to declare it trouble-free. Builders considering a similar modification should treat PSU compatibility as a design and test problem, not as an assumption derived from connector shape or successful initial operation. Power stability, thermal behavior, protection circuitry, and behavior under storage and USB load all remain material unknowns.
Signal integrity remains an open engineering question
The builder has also offered an unusually useful caveat: PCIe may be experiencing errors “under the hood,” but the necessary equipment to test it was unavailable. This is not a trivial footnote. PCIe routing and signal integrity are central to dependable NVMe storage and any later PCIe-to-SAS design.
Raspberry Pi documents PCIe Gen 2 operation for CM5 and cautions that Gen 3 operation is unsupported and might not work reliably. The carrier’s intended Gen 2 ×1 link is therefore the relevant target. Even at that supported mode, however, a custom board needs validation if it is to graduate from a promising prototype to a server trusted with important data.
A machine can appear normal in light testing while exhibiting intermittent storage faults, resets, or corruption risks during heavier and longer-running workloads. The available evidence does not show that those problems exist; equally, it does not rule them out. The sensible conclusion is that extended testing is still needed before treating the conversion as a proven always-on storage platform.
What the project demonstrates—and what it does not
EastMakes has demonstrated something genuinely interesting: an off-the-shelf Compute Module reference design can be transformed into a chassis-specific motherboard that uses the physical design of an old MicroServer far more elegantly than a generic single-board-computer installation. Rear I/O alignment, internal NVMe storage, and a direct-looking power connection show the value of designing around a particular enclosure rather than merely fitting parts wherever space permits.
The conversion also illustrates a more sustainable route for obsolete hardware. The N40L’s original computational limits need not condemn its chassis to recycling when a new low-power computing platform can be designed around it. For homelab users, that can be an appealing alternative to buying a wholly new compact server.
But several claims remain premature. There is no comparative benchmark record showing how much faster the finished system is than the original N40L. There is no published proof of continuous PCIe reliability, no confirmed power-rail validation, and no documented current connection between the custom board and all four front drive bays. Nor is there evidence in the available project material of a release plan, cost, production-ready files, or a supported product for other N40L owners to buy.
The best way to view the build, then, is as a promising custom carrier-board prototype and a thoughtful chassis-reuse exercise. It is not yet a verified recipe for a high-performance four-bay NAS, a drop-in replacement motherboard, or a universal modernisation path for old x86 home servers. Those interested in copying the idea should prioritize electrical and long-duration storage testing, understand the one-lane PCIe constraint, and avoid making operating-system assumptions that the project has not documented.
That measured view does not diminish the accomplishment. It clarifies why the project is interesting: it turns a familiar retired server case into a platform for new engineering, while exposing exactly how much engineering is required to make old hardware reuse dependable rather than merely clever.